Ray Siferd: search on Z-Library

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1

1GS/s pipelined delta sigma modulator ADC using residue averaging technique

Saiyu Ren, Ray Siferd

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2008

Language:

english

File:

PDF, 788 KB

english, 2008

2

Design and performance of a robust 180

Saiyu Ren, John Emmert, Ray Siferd

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2011

Language:

english

File:

PDF, 1.24 MB

english, 2011

3

High Performance CMOS Analog Arithmetic Circuits

Jing Xu, Ray Siferd, Robert L. Ewing

Journal:

Analog Integrated Circuits and Signal Processing

Year:

1999

Language:

english

File:

PDF, 208 KB

english, 1999

4

[IEEE NAECON 2011 - IEEE National Aerospace and Electronics Conference - Dayton, OH, USA (2011.07.20-2011.07.22)] Proceedings of the 2011 IEEE National Aerospace and Electronics Conference (NAECON) - Multiplier-less Digital Down Converter in 90nm CMOS technology

Ren, Saiyu, Billman, Steven, Siferd, Ray

Year:

2011

Language:

english

File:

PDF, 555 KB

english, 2011

5

High Performance CMOS Analog Arithmetic Circuits

Jing Xu, Ray Siferd, Robert L. Ewing

Journal:

Journal of Signal Processing Systems

Year:

1999

Language:

english

File:

PDF, 201 KB

english, 1999

6

CMOS Analog Implementation of a Discrete-Time 9-Tap FIR Filter with Circular Buffer Architecture

Rong Wang, Ray Siferd, Robert L. Ewing

Journal:

Analog Integrated Circuits and Signal Processing

Year:

2001

Language:

english

File:

PDF, 190 KB

english, 2001

7

[IEEE 2006 49th IEEE International Midwest Symposium on Circuits and Systems - San Juan, PR (2006.08.6-2006.08.9)] 2006 49th IEEE International Midwest Symposium on Circuits and Systems - Pipelined Delta Sigma Modulator Analog to Digital Converter

Ren, Saiyu, Siferd, Ray, Blumgold, Robert, Emami, Nima, Gillen, Robert

Year:

2006

Language:

english

File:

PDF, 1.59 MB

english, 2006

8

[IEEE 2009 IEEE International SOC Conference (SOCC) - Belfast, Northern Ireland (2009.09.9-2009.09.11)] 2009 IEEE International SOC Conference (SOCC) - Performance comparison of two low power wide tuning range VCOs in 90 nm CMOS

Ren, Saiyu, Siferd, Ray

Year:

2009

Language:

english

File:

PDF, 339 KB

english, 2009

9

[IEEE 2011 Eighth International Conference on Information Technology: New Generations (ITNG) - Las Vegas, NV, USA (2011.04.11-2011.04.13)] 2011 Eighth International Conference on Information Technology: New Generations - CMOS 1.6 GHz Bandwidth 12 Bit Time Interleaved Pipelined ADC

Ren, Saiyu, Siferd, Ray

Year:

2011

Language:

english

File:

PDF, 359 KB

english, 2011

10

[IEEE 2006 49th IEEE International Midwest Symposium on Circuits and Systems - San Juan, PR (2006.08.6-2006.08.9)] 2006 49th IEEE International Midwest Symposium on Circuits and Systems - Digital Channelized Wide Band Receiver Implemented with a Systolic Array of Multi-Rate FIR Filters

Rodney, David, Siferd, Ray

Year:

2006

Language:

english

File:

PDF, 2.56 MB

english, 2006

11

Logistic Function based Memristor Model with Circuit Application

Abraham, Isaac, Ren, Saiyu, Siferd, Ray

Journal:

Year:

2019

Language:

english

File:

PDF, 1.20 MB

english, 2019

12

Logistic Function based Memristor Model with Circuit Application

Abraham, Isaac, Ren, Saiyu, Siferd, Ray

Journal:

Year:

2019

File:

PDF, 1.20 MB

2019

13

High-sensitivity high-speed dynamic comparator with parallel input clocked switches

Zhang, Xiaomeng, Li, Shuo, Siferd, Ray, Ren, Saiyu

Journal:

AEU - International Journal of Electronics and Communications

Year:

2020

File:

PDF, 1.89 MB

2020

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